DAC
Tuesday, June 15

Exhibits 9am-6pm

Keynote
8:30 am-10:15 am Rm Ballroom ABC: From Contract to Collaboration: Delivering a New Approach to Foundry, Douglas Grose - GlobalFoundries

Management Seminar
10:30 am-6:00 pm Rm 204C: Management Day

Pavilion Panels - Exhibit Hall C - Booth #694
10:30 am-11:30 am: Hogan's Heroes: What Design and Lithography Nightmares will 22nm Bring?
1:30 pm-2:15 pm: Everyone Loves a Teardown
2:30 pm-3:15 pm: Is the FPGA Tool Opportunity an Oasis or a Mirage?
3:30 pm-4:15 pm: 28nm and Below: SOC Design Ecosystem at a Crossroad
4:30 pm-5:15 pm: Hot and SPICEy: Users Review Different Flavors of SPICE and Fast SPICE

Panels
10:30 am-12:00 pm Rm 207AB: EDA Challenges and Options: Investing for the Future
2:00 pm-4:00 pm Rm 207AB: Bridging Pre-Silicon Verification and Post-Silicon Validation
4:30 pm-6:00 pm Rm 207AB: Who Solves the Variability Problem?

Special Sessions
10:30 am-12:00 pm Rm 209AB: Post-Silicon Validation or Avoiding the $50 Million Paperweight
2:00 pm-4:00 pm Rm 209AB: Virtualization in the Embedded Systems: Where Do We Go?
4:30 pm-6:00 pm Rm 209AB: Joint DAC/IWBDA Special Session - Engineering Biology: Fundamentals and Applications

Research Paper Sessions
10:30 am-12:00 pm Rm 207D: Speed Up Your Model! RTL, Data-Flow, or SystemC
10:30 am-12:00 pm Rm 207C: Embedded Software Timing Matters!
10:30 am-12:00 pm Rm 210AB: Thermal Tracking, Monitoring and Characterization
10:30 am-12:00 pm Rm 210CD: Advanced Clock Design and Flip-Chip Layout
2:00 pm-4:00 pm Rm 207D: Memory and Multiprocessor Design Space Exploration
2:00 pm-4:00 pm Rm 207C: Interconnect Networks: Present and Future
2:00 pm-4:00 pm Rm 210AB: Core Techniques in Formal Verification
2:00 pm-4:00 pm Rm 210CD: New Frontiers in Routing
4:30 pm-6:00 pm Rm 207D: Reliability and Integrity of Circuits and Systems
4:30 pm-6:00 pm Rm 207C: Embedded Hardware for Security, Data Type Refinement, and Arbitration
4:30 pm-6:00 pm Rm 210AB: Statistical Techniques for Silicon-to-Model Correlation
4:30 pm-6:00 pm Rm 210CD: Placement: From Traditional Techniques to Novel Circuit Styles

IC Design Central - Exhibit Hall B - Booth #1710
12:00 pm-12:30 pm: Cambridge Analog Technologies: Ultra-Low-Power High Performance Analog to Digital Converters without Operational Amplifiers
12:30 pm-1:00 pm: X-FAB Semiconductor Foundries: Designing for Analog/Mixed-Signal Extremes: High-Temperature / High-Reliability
1:00 pm-1:30 pm: Avant Technology, Inc.: IP Solutions for SOC
1:30 pm-2:00 pm: Altair Engineering: Reduce, Reuse, Recycle – 21st Century Workload Scheduling with PBS Works
2:00 pm-2:30 pm: TSSI - Test Systems Strategies, Inc.: Pre-Silicon Validation – Why Some Designs Always Beat the Deadline?
2:30 pm-3:00 pm: Enterpoint Ltd.: Using Broaddown5 as ASIC Prototyping Target

User Track
10:30 am-12:00 pm Rm 208AB: Timing is Everything
1:30 pm-3:00 pm Rm 2nd Floor Foyer Adjacent to 208AB: Tuesday User Track Poster Session
3:00 pm-4:00 pm Rm 208AB: Front-End Design Experiences
4:30 pm-6:00 pm Rm 208AB: Taming Back-End Verification and DFM

Events
12:00 pm-2:00 pm Rm 303AB: CEDA: “Beyond von Neumann Computing”

Exhibitor Forum - Exhibit Hall B - Booth #1562
1:00 pm-3:00 pm: Emulation, ESL and FPGAs
3:15 pm-4:30 pm: SI and EM Analysis

Additional Meetings
12:00 pm-2:00 pm Rm Anaheim Marriott, Grand Ballroom Salon E: Industry Leaders Verification Luncheon
12:00 pm-1:30 pm Rm Ballroom E: 8th Annual ESL Symposium Panel
5:45 pm-7:00 pm Rm 206B: CANDE Meeting
6:00 pm-8:00 pm Rm Hilton Anaheim, Huntington ABC: 3D/TSV Technology Reception: Education, Benefits, Solutions
6:30 pm-8:00 pm Rm 208AB: Birds-of-a-Feather Meetings
6:30 pm-8:00 pm Rm 209AB: Promoting DAC Content Via Social Media
6:30 pm-8:00 pm Rm 210AB: “MEMS @ DAC: Ready to Cross the Chasm”

Colocated Events
2010-06-18 Rm 205AB: NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2010)
2010-06-16 Rm 204AB: ACM Student Research Competition