Survey
Session 1 - PANEL: EDA Challenges and Options: Investing for the Future
Session 2 - SPECIAL SESSION: Post-Silicon Validation or Avoiding the $50 Million Paperweight
Session 7 - PANEL: Bridging Pre-Silicon Verification and Post-Silicon Validation
Session 8 - SPECIAL SESSION: Virtualization in the Embedded Systems: Where Do We Go?
Session 13 - PANEL: Who Solves the Variability Problem?
Session 19 - PANEL: 3-D Stacked Die: Now or the Future?
Session 20 - SPECIAL SESSION: A Decade of NOC Research - Where Do We Stand?
Session 25 - PANEL: Does IC Design Have a Future in the Clouds?
Session 26 - SPECIAL SESSION: The Analog Model Crisis – How Can We Solve It?
Session 31 - PANEL: What’s Cool for the Future of Ultra Low-Power Designs?
Session 32 - SPECIAL SESSION: Design Closure for Reliability
Session 37 - PANEL: Designing the Always-Connected Car of the Future
Session 43 - PANEL: Joint User Track Panel (Session 11U) - What Will Make Your Next Design
Session 44 - SPECIAL SESSION: Cyber-Physical Systems Demystified
Session 49 - PANEL: What Input Language is the Best Choice for High-Level Synthesis (HLS)?
Session 50 - SPECIAL SESSION: Computing Without Guarantees
Session 54 - SPECIAL SESSION: Smart Power: From your Cell Phone to your Home
